sky130_fd_sc_hd__inv¶
Inverter
This is a stub of cell description file
Cell name: sky130_fd_sc_hd__inv
Type: cell
Verilog name: sky130_fd_sc_hd__inv
Library: sky130_fd_sc_hd
Inputs: 1 (A)
Outputs: 1 (Y)
Symbols¶
Schematic¶
GDSII Layouts¶
sky130_fd_sc_hd__inv_1¶
sky130_fd_sc_hd__inv_12¶
sky130_fd_sc_hd__inv_16¶
sky130_fd_sc_hd__inv_2¶
sky130_fd_sc_hd__inv_4¶
sky130_fd_sc_hd__inv_6¶
sky130_fd_sc_hd__inv_8¶