sky130_fd_sc_hd__or3b¶
3-input OR, first input inverted
This is a stub of cell description file
Cell name: sky130_fd_sc_hd__or3b
Type: cell
Verilog name: sky130_fd_sc_hd__or3b
Library: sky130_fd_sc_hd
Inputs: 3 (A, B, C_N)
Outputs: 1 (X)
Symbols¶
Schematic¶
GDSII Layouts¶
sky130_fd_sc_hd__or3b_1¶
sky130_fd_sc_hd__or3b_2¶
sky130_fd_sc_hd__or3b_4¶