sky130_fd_sc_hdll__fill¶
Fill cell
This is a stub of cell description file
Cell name: sky130_fd_sc_hdll__fill
Type: cell
Verilog name: sky130_fd_sc_hdll__fill
Library: sky130_fd_sc_hdll
Inputs: 0 ()
Outputs: 0 ()
Symbols¶
Schematic¶
GDSII Layouts¶
sky130_fd_sc_hdll__fill_1¶
sky130_fd_sc_hdll__fill_2¶
sky130_fd_sc_hdll__fill_4¶
sky130_fd_sc_hdll__fill_8¶